Hardware Design and Implementation of SM3 Hash Algorithm for Financial IC Card

摘要

This paper focuses on the circuit design for SM3, which is the only standard hash algorithm of China. This paper presents a new VLSI architecture of SM3 for financial IC card. Since there is no such hardware implementation in literature, our work is the first one to integrate SM3 into financial IC card. In accordance with the technical specifications and based on SMIC 0.13um technology, the circuit design, behavioral simulation, gate-level simulation, power analysis, and the FPGA verification are all implemented. The results show that the SM3 IP core design is correct and feasible. Comprehensive validation results show that the design is within the area of 11000 gates and the power of 1mA @ 1.2V, suitable for financial IC card, which require small area and low power, and far below the design specifications.