An Energy Efficient Programmable Hardware Implementation of the Secure Hash 384 and 512 Algorithms

摘要

The sustained growth of communication networks over the past few years has led to a phenomenal increase in the amount of data being carried over them. A consequence of this has been an increase in the amount of sensitive data being carried over these networks resulting in the need for a secure means of data transfer. Used for this purpose, cryptographic algorithms, among others, are known to be computationally intensive, consuming a significant amount of computing resources-a fact of critical importance for wireless devices that usually have very limited resources in terms of battery power. This paper proposes programmable energy efficient architectures for the SHA-384 and 512 algorithms.