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Integrated RF transformer and power combiner design in 150nm CMOS process

机译:150nm CMOS工艺中的集成射频变压器和功率组合器设计

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An integrated passive power combiner is discussed and characterized based on test structure fabricated in a 150 nm LFoundry CMOS process. The power combiner uses differentially driven coupled transformers as a basic building block. We discuss first the constraint driven sythesis of the transformer itself and the device modeling with a rapid RLCk model extractor. Helic's electronic design automation (EDA) tools are used for both, synthesis and extraction of the passive devices. The accuracy of the extracted transformer model is proven by comparison to an EM tool. The fabricated power combiner structure is finally extracted with the same EDA toolset and compared to measured data from on-wafer experiments. Good agreement is achieved in all cases proving the accuracy of the proposed synthesis and extraction methodology for complex RF IC designs.
机译:基于在150 nm LFoundry CMOS工艺中制造的测试结构,对集成的无源功率组合器进行了讨论和表征。功率合成器使用差动驱动耦合变压器作为基本构件。我们首先讨论变压器本身的约束驱动合成以及使用快速RLCk模型提取器进行的设备建模。 Helic的电子设计自动化(EDA)工具用于无源设备的合成和提取。通过与EM工具进行比较,可以证明提取出的变压器模型的准确性。最后,使用相同的EDA工具集提取制造的功率组合器结构,并将其与晶圆上实验的测量数据进行比较。在所有情况下都达成了良好的协议,证明了所提出的用于复杂RF IC设计的合成和提取方法的准确性。

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