首页> 外文会议>IEEE International Conference on Micro Electro Mechanical Systems >Ultra-low power self-computing binary output digital MEMS accelerometer
【24h】

Ultra-low power self-computing binary output digital MEMS accelerometer

机译:超低功耗自计算二元输出数字MEMS加速度计

获取原文

摘要

This work presents the concept and preliminary results for electromechanical self-computing binary output digital accelerometers. Such devices require only bias voltages and no readout or control electronics for operation (zero static power for operation). The device comprises of a number of acceleration switches (equal to the number of the bits of resolution) which are coupled to each other via electrostatic actuators. As a result of an applied acceleration and interactions of switches and actuators with each other, a digitized binary acceleration output is generated. In this work, a 2-bit accelerometer operating in the 0-1g range is successfully demonstrated.
机译:这项工作介绍了机电自计算二进制输出数字加速度计的概念和初步结果。这些装置只需要偏置电压,没有读出或控制电子设备进行操作(零静态功率用于操作)。该装置包括许多加速度开关(等于分辨率的比特的数量),其通过静电致动器彼此耦合。由于开关和致动器彼此的应用加速度和相互作用,产生了数字化二进制加速度输出。在这项工作中,成功地证明了在0-1G范围内运行的2位加速度计。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号