Oversampled continuous-time analog-to-digital converters are on the verge of surpassing the bandwidth of their discrete-time counterparts as their sampling rates continue to increase while recent innovative architectures have reduced their oversampling ratios. This paper outlines several architectures that have led to these improvements, which include single-loop ΔΣ modulators, cascaded or MASH ΔΣ modulators, and pipeline data converters.
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