A 9-bit 10MSps SAR ADC with double input range for supply voltage

摘要

This paper presents a pre-charge VCM-based method for 1.2V 9-bit 10MSps Successive Approximation register (SAR) ADC. This conversion mechanism achieves the twice range of the input signal range beyond the supply voltage. We introduces a dynamic comparator with a special design and an additional comparison stage before each redistribution stage in the pre-conversion. The prototype was designed on 65nm CMOS technology. The simulation results shows INL and DNL 0.05 and 0.035 LSB respectively. The ADC consumes a total energy of 0.504 mW at a 1.2V supply and 10MSps.