Discussion on failure mechanism and corresponding evaluation technology for the reliability of IC's applications in board-level assembly

摘要

The stresses, reliability issues and failure mechanisms of IC in post second level assembly state are significant different IC in free standing state. Based on the full step analysis of electronic assembly process, this paper demonstrated the possible stress opportunities and corresponding reliability issues in each assembly step from initial paste deposition to final board level installation. The main stresses and reliability issues in general filed application including storage, transport and using were also summarized. Finally, a series of reliability test methods were put forward in detail based on typical failure mechanisms that were analyzed from actual failure cases.