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Processing Models Based on Stress Conservation Law Utilized for Temperature-Dependent Warpage Prediction of MUF FCCSP with 3L ETS

机译:基于应力保守法的处理模型,利用3L ETS对MUF FCCSP的温度依赖性翘曲预测

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Embedded trace substrate (ETS), like a typical build-up process that prepreg (PP) has been laminated on the copper trace patent, is a coreless substrate design for improvement both production yield and capability of substrate with finer line and space (L/S) dimension. The manufacturing process of ETS used an electrolytic copper plating method to form copper foil pattern coated on carrier board, and then multi-layers of ETS structure will duplicate the same process flow to been made, such as laser via drill, electro-less copper plating, dry-film lamination, exposure and development, next layer plating of copper pattern, stripping after removing carrier board, micro etching to enhance adhesion with solder mask, and metal treatment of surface finish after process of solder mask opening. Different to traditional build-up process, the trace width of ETS structure would not be attacked during process of micro etching, and the wall structure formed by dry-film between traces can prevent solder bridge problem of copper pillar bump during process of flip chip bond (FCB) [1]. Manufacturing process of ETS must go through a sequential high-temperature and -pressure step, thus the approach to construct a complex and detailed model is so far engineer's objective for accurate prediction. When the assumption of stress-free at single curing temperature even though the chemical shrinkage has be considered is challenged, manufacturing temperature-independent model could not match well with experimental measurements because they don't include an integrated processing modeling methodology. In particular, temperature-dependent material properties and different stress-free temperatures for different materials in the same model were considered in order to model the sequential steps during the sequential fabrication of high-density electronic packaging structures. However, the effort on fundamental study usually makes an impossible work due to time-and manpower-consuming, thus the mission has been transferred to construct an effective and simple approach on thermo-mechanical analysis. In this study, the material modeling has been simply constructed on elastically temperature-dependence for polymeric material utilized in packaging extensively. Furthermore, the innovative concept of conservation laws also has been developed on stress constitutive model; meanwhile, the creative ideology, such as cross-linking induced residual strain (εRS) from compound forming and process-induced stress field, further has been embedded. Others, the experimental vehicles also have been performed for a reasonable simplification at single stress-free temperature of substrate, besides measurements were scheduled to confirm the accuracy on warpage. As comparison, these two different warpage modeling methodologies, including processing model and non-processing model, of an encapsulated integrated circuit (IC) package, associated with different schemes of a sequential manufacturing process, were analyzed. The results indicate if elastically stress constitutive model is: (1) constructed on stress conservation law with temperature-dependent property; (2) considered at single stress-free temperature respectively for compound and substrate; and (3) involved the effect of residual strain from compound forming, the numerical solutions were agreed well with measured data. Finally, the capability to save computation for effective material property of laminated substrate has been tested and indicated that material property in in-plane direction can be treated as homogeneous by rule of mixture, especially for temperature below the glass transition temperature (Tg) of PP.
机译:嵌入式跟踪基板(ETS),像典型的积聚过程,预浸料坯(PP)被层压在铜迹线的专利,是一种无芯基板设计的改进既产量和基板的能力具有更精细的线和空间(L / S)尺寸。 ETS的制造过程中使用的电解镀铜法形成的铜箔涂覆在载体板图案,然后ETS结构的多层将重复相同的处理流程来完成的,如通过钻,电更少镀铜激光,干膜层压,曝光和显影,铜图案的下一层电镀,除去载板剥离后,微蚀刻,以提高阻焊层开口的工序后,用焊料掩模粘附性,和表面光洁度的金属处理。不同于传统的堆积过程,ETS结构的迹线宽度将不被微蚀刻的过程中,攻击,和倒装芯片键合的过程中由迹线可以防止铜柱隆起焊盘的焊料桥问题之间干膜形成的壁结构(FCB)[1]。 ETS的制造过程中必然要经历一个连续的高温 - 压力的步骤,因此这种方法来构建一个复杂和详细的模型是迄今为止工程师的目标进行准确的预测。当因为它们不包括集成处理建模方法的无压力的,即使化学收缩一直被认为是挑战单固化温度,制造与温度无关的模型假设无法与实验测量很好的匹配。特别地,随温度变化的材料特性以及对于不同的材料在同一模型中不同无应力的温度以高密度电子封装结构的连续制造过程中的顺序步骤模型中考虑。然而,对基础研究的努力通常使一个不可能的工作,由于时间和人力消耗,因此任务已经转移到构建在热机械分析的有效和简单的方法。在这项研究中,建模材料被简单地用于在广泛使用的包装的聚合物材料弹性温度依赖性构成。此外,守恒定律也有应力本构模型被开发出来的创新理念;同时,创造性的思想,如交联引起的残余应变(ε Rs )从化合物形成和过程引起的应力场,还已经嵌入。其他人,实验车辆也已记载用于在衬底的单个无应力温度的合理的简化执行,除了测量预定确认上翘曲的准确性。作为比较,这两个不同的翘曲建模方法,包括处理模型和非加工模型,封装集成电路(IC)封装,具有一个连续的制造过程的不同方案相关联的,进行了分析。结果表明,如果弹性强调构模型是:(1)与温度相关的属性上应力守恒定律构造; (2)在考虑单个无应力温度分别为化合物和基板;和(3)涉及由化合物形成的残余应变的效果,数值溶液用测得的数据吻合。最后,能力节省计算用于层叠基板的有效材料性能进行了测试,并表示材料特性在面内方向可为均匀由混合物的规则进行处理,特别是对于低于玻璃化转变温度温度(T g )PP的。

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