3D modeling of flip chip assemblies with large array and small pitch: validation of the proposed model

摘要

A constitutive model based on the micromechanical characterization of the effective thermo-elastic properties of the interconnection layer of a flip chip assembly and its implementation in a finite element code is analyzed. Given the impossibility of modeling large-size assemblies containing more than one million solder bumps (more than 20 billion of elements will be needed), the suggested approach seems to be an adequate solution. The interconnection layer consisting of solder bumps surrounded by underfill (epoxy) was replaced by a homogeneous equivalent material (HEM) and the process of manufacturing (thermal loading) of the assembly has been simulated. The equivalent model allows estimation of the mean stress and strain fields in each phase of the interconnection layer. The reliability of these types of microelectronic assembly is potentially related to that of the interconnection layer. Thus, to approximate more precisely the real stress and strain fields in these phases, two structural zooming models were developed namely by coupling and sub-modeling. After comparisons, submodeling seemed to be the more precise and can be used, together with the equivalent model, for a megapixel flip chip assembly calculations.