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Low voltage CMOS charge pump with excellent current matching based on a rail-to-rail current conveyor

机译:低压CMOS电荷泵,基于轨到轨电流输送机具有出色的电流匹配

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A low voltage charge pump with excellent current matching in a wide dynamic range is proposed. It is aimed to be used in state of the art frequency synthesizers. The key concept is the direct equation of currents, instead of indirectly equating transistor voltages, using the current following action of a second generation current conveyor. The voltage buffer of the current conveyor is used to replicate the operating conditions of the NMOS current sink and create an equal current at the X input. According to the PFD signals this current can be mirrored to the Z output and be used to source current to the charge pump output, while a source switching scheme is used to reduce glitches. The proposed design exhibits both static and dynamic high performance characteristics in terms of very low DC current mismatch, of the order of 0,05%, and suppressed transient glitches. Both these non-idealities degrade performance of PLLs inducing reference spurs and phase offset, and thus must be minimized. The proposed circuit is implemented in TSMC 65nm process and simulation results demonstrate performance in a wide output voltage range from 100mV to 950mV.
机译:提出了一种低压电荷泵,具有宽动态范围内具有出色电流匹配的泵。它旨在用于最先进的频率合成器。关键概念是电流的直接方程,而不是间接等于晶体管电压,使用第二代电流输送机的电流。电流输送机的电压缓冲器用于复制NMOS电流吸收器的操作条件,并在X输入处创建相同的电流。根据PFD信号,该电流可以镜像到Z输出并用于源电流到电荷泵输出,而源切换方案用于减少毛刺。所提出的设计在非常低的DC电流不匹配方面表现出静态和动态的高性能特征,0.05%,抑制瞬态故障。这两个非理想都会降低PLL的性能,诱导参考马刺和相位偏移,因此必须最小化。所提出的电路在TSMC 65NM过程中实现,仿真结果在宽输出电压范围内的性能展示了100mV至950mV。

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