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Concept of a stacked feedback PA with on-chip auto-adjusted base voltage of upper transistor

机译:堆叠反馈PA的概念与上晶体管的片上的自动调节基极电压

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In this paper, we show a power amplifier (PA) with stacked transistors. It is fabricated in a 250nm standard BiC-MOS technology. An adaptive adjustment of the base voltage at the upper transistor ensures equal collector-emitter voltages over the stacked transistors for all operating conditions. Additionally, a slight enhancement of the maximum efficiency was measured. By using an input amplifier with serial negative feedback for gain bandwidth enhancement over the frequency and an output amplifier with parallel negative feedback the PA provides a 3dB gain bandwidth of about 800 MHz and a 1 dB compression point bandwidth of about 1.4 GHz at an operation frequency of 2.6 GHz in measurements.
机译:在本文中,我们显示了带堆叠晶体管的功率放大器(PA)。它以250nm标准的BIC-MOS技术制造。在上晶体管处的基极电压的自适应调整确保了在堆叠的晶体管上的等于的集电极 - 发射极电压,用于所有操作条件。另外,测量了最大效率的略微增强。通过使用具有串行负反馈的输入放大器,用于在频率和具有并联负反馈的输出放大器上增益带宽增强,PA在操作频率下提供约800MHz的3DB增益带宽和约1.4GHz的1 dB压缩点带宽测量中的2.6 GHz。

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