A low-power, continuous-time sigma-delta modulator for MEMS microphones

摘要

This paper presents a continuous-time ΣΔ ADC for MEMS microphone integrated interface applications. The ΣΔ modulator features a 3^rd-order loop filter realized with only two operational amplifiers to reduce power consumption. It exploits a 15-level quantizer and 3-MHz sampling frequency to minimize the impact of clock jitter. The proposed architecture can handle an excess loop delay of half period of the sampling clock. The ΣΔ modulator, simulated at transistor-level, performs a 105.5dB A-weighted dynamic range (DR) and a 100.8 dB signal-to-noise-and-distortion ratio (SNDR) at −2 dBFS. The device operates from a single 1.8 V and consumes 200 μW.