首页> 外文会议>Electronic Components and Technology Conference (ECTC), 2012 IEEE 62nd >Temporary wafer bonding defect impact assessment on substrate thinning: Process enhancement through systematic defect track down
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Temporary wafer bonding defect impact assessment on substrate thinning: Process enhancement through systematic defect track down

机译:临时晶圆键合缺陷对基板减薄的影响评估:通过系统地追踪缺陷来增强工艺

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摘要

Among the technological developments pushed by the emergence of 3D-ICs, wafer thinning has become a key element in device processing over the past years. As volume increases, defects in the overall thinning process flow will become a major element of focus in the future. Indeed product wafers arriving at this point of process are of maximum value. Fundamental understanding of the potential defects and their impact on devices is therefore needed to minimize their recurrence.
机译:在3D-IC的出现推动的技术发展中,晶圆减薄已成为过去几年中器件加工的关键因素。随着数量的增加,整个稀疏工艺流程中的缺陷将成为未来关注的主要因素。实际上,到达该工艺点的产品晶圆具有最大价值。因此,需要对潜在缺陷及其对设备的影响有基本的了解,以最大程度地减少其复发。

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