Package on Package (PoP) stacking has become anattractive method for 3D integration to meet the demands ofhigher functionality in ever smaller packages, especiallywhen coupled with the use of stacked die. To accomplish this,new packaging designs need to be able to integrate more dieswith greater function, higher I/O counts, smaller pitches, andgreater heat densities, while being pushed into smaller andsmaller footprints. A new 3D “Package Interposer Package”(PIP) solution is suitable for combining multiple memory,ASICs, stacked die, stacked packaged die, etc., into a singlepackage. This approach also favors system integration withhigh density power delivery by appropriate interposer designand thermal management. Traditional Package on Package(PoP) approaches use direct solder connections between thesubstrates and are limited to use of single (or minimum) dieon the bottom substrate, to reduce warpage and improvestability. For PIP, the stability imparted by the interposerreduces warpage, allowing assemblers of the PIP to select thetop and bottom components (substrates, die, stacked die,modules) from various suppliers. This mitigates the problemof variation in warpage trends from room temperature toreflow temperature for different substrates/modules whencombined with other packages. PIP facilitates more spaceefficientdesigns, and can accommodate any stacked dieheight without compromising warpage and stability. PIP canaccommodate modules with stacked die on organic, ceramic,or silicon board substrates, where each can be detached andreplaced without affecting the rest of the package. Thus, PIPwill be economical for high-end electronics, since a damaged,non-factional part of the package can be selectively removedand replaced. A variety of interposer structures were used tofabricate Package Interposer Package (PIP) modules.Electrical connections were formed during reflow using a tinleadeutectic solder paste. Interconnection among substrates(packages) in the stack was achieved using interposers.Plated through holes in the interposers, formed by laser ormechanical drilling and having diameters ranging from 50μm to 250 μm, were filled with an electrically conductiveadhesive and cured. The adhesive-filled and cured interposerswere reflowed with circuitized substrates to produce a PIPstructure. In summary, the present work describes anintegrated approach to develop 3D PIP constructions onvarious stacked die or stacked packaged die configurations.
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