Challenges in 3D Inspection of Micro Bumps Used in 3D Packaging

摘要

2.5D/3D devices are the next major packaging technologies, driven by the need for more functionality, lower powerconsumption and smaller footprint. Many device manufacturers are devoting capital to develop their own processesand some are already shipping devices such as FPGA (Field Programmable Gate Array) on interposers. 3D packagesoften require hundreds of thousands of I/O per die. Micro Pillar bumps and C4 bumps are the main bump geometriesused in 3D packages as their small pitch and size allow the required number of I/Os. Inspecting these bumpsthroughout the process is critical because failure after chip to chip or chip to wafer bonding is very costly. Thispaper describes the use of a camera and laser triangulation to provide complete 2D and 3D measurement andinspection capability.