Scallop Free Si Etching and Low Cost Integration Technologies for 2.5D Si Interposer.

摘要

In order to realize the manufacturing and cost benefits of via middle and via last technology for the 3Dstacked integration, creation of through silicon via (TSV) spanning all layers of fully formed chips mustbe realized. This is particularly new etching method challenging for TSV devices. The etch system is newTSV etcher that is a kind of high electron density ICP / NLD. In this paper, study on non Bosch Si etchmethod to get a smooth sidewalls with no scalloping and a good control of the etched profile using newplanar ICP plasma, and trying high selectivity to photo-resist mask for TSV etching to provide the totallowest cost processes.