Design of a C-element based clock domain crossing interface

摘要

Circuit failures due to metastability and single event transients are increasing in deep sub-micron technology. Technology scaling is also causing degradation in reliability of bi-stable circuits. Synchronization circuits that are robust to metastability are important especially with the increased use of multi-clock domain designs in SoCs. In this paper, we address the design and verification of clock domain crossing interfaces (CDCs) that connect mutually asynchronous clock domains. We propose the use of C-element based synchronizers in clock domain crossing interfaces. In order to enhance the Mean Time Between Failures (MTBF) of the interface, a new C-element design with an improved metastability recovery time is proposed. The new design is implemented in 90nm CMOS technology and simulated using SPICE.