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Parallel Multiple Polynomial Quadratic Sieve on Multi-core Architectures

机译:在多核架构上并行多项多项式二次筛

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The ability of multi-core processors to increase application performance depends on the use of multiple threads within applications. Symbolic computations, requiring both CPU power and large memory, are well-suited candidates for deriving advantages from multi-core parallel architectures. This is possible only if the specific libraries and tools are designed to allow multi-threading and multi-processes. In order to promote the changes needed to adapt these libraries and tools to the new architectures, the changes performed of a main algorithm for symbolic computations, parallel integer factorization, is described and discussed.
机译:多核处理器增加应用程序性能的能力取决于应用程序中的多个线程的使用。符号计算,需要CPU功率和大存储器,是候选候选者,用于导出来自多核并行架构的优势。只有当特定库和工具允许多线程和多过程时,才有可能。为了促进使这些库和工具适应新架构所需的变化,描述并讨论了对符号计算,并行整数分解的主要算法执行的改变。

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