A Time-Frequency Aware Cochlear Implant: Algorithm and System

摘要

A time-frequency aware (TFA) cochlear implant system and its speech processing strategy (TFA-CIS) are presented in this paper. The system is built upon an implanted low-power digital signal processor (THUCIDSP). And the TFA-CIS strategy takes advantages of the time-frequency aware wavelet packet (WP) filter bank (FB) and WP envelope detector. The joint use of the DSP hardware and the TFA strategy gives birth to a very low power cochlear implant system. Implementation result shows that the complexity of the new TFA-CIS algorithm is 1.82 million instructions per second (MIPS) with db1 wavelet base, and the power dissipation of the DSP is 2.11 mW @ 1.8V, 3MHz.