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Low cost, chip-last embedded ICs in thin organic cores

机译:薄有机内核中的低成本,最后芯片嵌入式IC

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This paper presents a novel technology to enable chip embedding in 1 or 2 metal layer substrates using chip-last embedding for its merits. The novel structure is obtained by embedding thin-chips within the core instead of the build-up layers as has been demonstrated previously [1]. To enable the smallest profile embedded die structure, results from the three critical elements of the technology- 1) fine lines and spaces on core, 2) small-diameter fine-pitch area-array through-holes, and 3) thermo-mechanical reliability of small diameter through-holes have been discussed in the paper. Lines and spaces as small as 7μm were demonstrated on core laminate by using build-up type processes. Copper-filled through-holes of 30–60μm diameters were successfully fabricated and shown to pass 1300 thermal cycles from −55°C to 125°C. In addition, through-hole drilling process was optimized to achieve ultra-fine pitches of 70–100μm. Comprehensive analysis of three new materials and associated fabrication processes, carried out to demonstrate the advantages and robustness of this manufacturing-friendly 1–2 metal layer chip-last embedding technology emphasizes that it is a promising technology to achieve ultra-miniaturization for future embedded systems and sub-systems.
机译:本文提出了一种新颖的技术,该技术能够利用后切嵌入技术将芯片嵌入到1个或2个金属层基板中。通过在芯内嵌入薄芯片而不是如先前已证明的堆积层来获得新颖的结构[1]。为了实现最小轮廓的嵌入式芯片结构,该技术的三个关键要素导致了这些结果:1)芯上的细线和间隔,2)小直径细间距区域阵列通孔以及3)热机械可靠性本文讨论了小直径通孔的设计。通过使用堆积型工艺,在芯层压板上演示了小至7μm的线和间距。成功制造了直径为30–60μm的铜填充通孔,并显示了从-55°C到125°C的1300个热循环。此外,优化了通孔钻孔工艺,以实现70–100μm的超细间距。对三种新材料和相关制造工艺进行了综合分析,以证明这种易于制造的1-2金属层芯片最后嵌入技术的优势和坚固性强调了对于未来的嵌入式系统实现超小型化是一项很有前途的技术和子系统。

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