首页> 外文会议>IEEE/ACM International Symposium on Microarchitecture >From SODA to scotch: The evolution of a wireless baseband processor
【24h】

From SODA to scotch: The evolution of a wireless baseband processor

机译:从苏打到苏格兰威斯特:无线基带处理器的演变

获取原文

摘要

With the multitude of existing and upcoming wireless standards, it is becoming increasingly difficult for hardware-only baseband processing solutions to adapt to the rapidly changing wireless communication landscape. Software Defined Radio (SDR) promises to deliver a cost effective and flexible solution by implementing a wide variety of wireless protocols in software. In previous work, a fully programmable multicore architecture, SODA, was proposed that was able to meet the real-time requirements of 3G wireless protocols. SODA consists of one ARM control processor and four wide single instruction multiple data (SIMD) processing elements. Each processing element consists of a scalar and a wide 512-bit 32-lane SIMD datapath. A commercial prototype based on the SODA architecture, Ardbeg (named after a brand of Scotch Whisky), has been developed. In this paper, we present the architectural evolution of going from a research design to a commercial prototype, including the goals, tradeoffs, and final design choices. Ardbeg’s redesign process can be grouped into the following three major areas: optimizing the wide SIMD datapath, providing long instruction word (LIW) support for SIMD operations, and adding application-specific hardware accelerators. Because SODA was originally designed with 180nm technology, the wide SIMD datapath is re-optimized in Ardbeg for 90nm technology. This includes re-evaluating the most efficient SIMD width, designing a wider SIMD shuffle network, and implementing faster SIMD arithmetic units. Ardbeg also provides modest LIW support by allowing two SIMD operations to issue in the same cycle. This LIW execution supports SDR algorithms’ most common parallel SIMD execution patterns with minimal hardware overhead. A viable commercial SDR solution must be competitive with existing ASIC solutions. Therefore, algorithm-specific hardware is added for performance bottleneck algorithms while still maintaining enough flexibility to support mu--ltiple wireless protocols. The combination of these architectural improvements allows Ardbeg to achieve 1.5–7x speedup over SODA across multiple wireless algorithms while consuming less power.
机译:凭借众多现有和即将到来的无线标准,硬件基带处理解决方案越来越困难,以适应快速改变的无线通信景观。软件定义的无线电(SDR)承诺通过在软件中实施各种无线协议来提供成本效益和灵活的解决方案。在以前的工作中,提出了一个完全可编程的多核架构,苏打化能够满足3G无线协议的实时要求。 SODA由一个ARM控制处理器和四个宽单指令多数据(SIMD)处理元件组成。每个处理元件由标量和宽512位32通道SIMD数据路径组成。已经开发出基于SODA架构的商业原型,基于苏打架构(以苏格兰威士忌品牌命名)。在本文中,我们展示了从研究设计到商业原型的建筑演变,包括目标,权衡和最终设计选择。 ARDBEG的重新设计过程可以分为以下三个主要领域:优化宽SIMD数据路径,提供用于SIMD操作的长指令字(LIW)支持,并添加特定于应用程序的硬件加速器。由于苏打公司最初设计有180nm的技术,因此宽的SIMD数据路径在Ardbeg进行了90nm技术中重新优化。这包括重新评估最有效的SIMD宽度,设计更广泛的SIMD洗牌网络,并实现更快的SIMD算术单元。 ArdBeg还通过允许在同一周期中发出两个SIMD操作来提供适度的LIW支持。此LIW执行支持具有最小硬件开销的SDR算法最常见的并行SIMD执行模式。可行的商业SDR解决方案必须与现有的ASIC解决方案具有竞争力。因此,为性能瓶颈算法添加了特定于算法的硬件,同时仍然保持足够的灵活性来支持MU-LTIPL无线协议。这些架构改进的组合允许ArdBeg在多种无线算法上通过苏打水达到1.5-7倍的加速,同时消耗更少的功率。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号