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TAB-BackSpace: Unlimited-length trace buffers with zero additional on-chip overhead

机译:TAB-BackSpace:无限长度的跟踪缓冲区,零额外的片上开销

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This paper presents TAB-BackSpace, our novel scheme to provide the effect of an unlimited-length trace buffer with no on-chip overhead beyond the existing debug logic. We present the theoretical foundation of our work, simulation studies on how we reduce the possibility of computing an erroneous trace, and results from the bring-up lab on real silicon of an IBM POWER7 processor, where TAB-BackSpace computes almost a thousand additional cycles of trace buffer information without any additional on-chip overhead.
机译:本文介绍了TAB-BackSpace,这是我们的新颖方案,可提供无限长度的跟踪缓冲区,而没有除现有调试逻辑之外的片上开销。我们提供了工作的理论基础,关于如何减少计算错误轨迹的可能性的仿真研究,以及IBM POWER7处理器的真实芯片上的启动实验室的结果,其中TAB-BackSpace可计算将近一千个额外周期跟踪缓冲区信息,无需任何额外的片上开销。

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