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Low voltage and low power DLL-based frequency synthesizer for covering VHF frequency band

机译:用于覆盖VHF频带的基于低电压和低功耗DLL的频率合成器

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New architecture for a DLL based frequency synthesizer for wireless transceivers presents in this paper. This architecture has the advantages of occupy low area, low power, low voltage and low phase noise. DLLs are first ordered systems, so good stability can obtain in this design. This structure also can be used for generating fractional multiple of reference frequencies. The proposed circuit can operate at a substantially low supply voltage. As an example, the synthesizer is adopted to create the channel frequencies of French DVB-H/T standard. The circuit level and system level designs are presented. Also power consumption trade-offs are reported. It was shown that for the mentioned standard a mere 27 delay stages for VCDL is sufficient. Simulation results confirm the analytical predictions. The proposed DLL-based frequency synthesizer is implemented in a 0.13um CMOS technology.
机译:本文提出了一种用于无线收发器的基于DLL的频率合成器的新架构。这种架构的优点是占用面积小,功耗低,电压低,相位噪声低。 DLL是第一个有序的系统,因此可以在此设计中获得良好的稳定性。该结构还可以用于生成参考频率的分数倍。所提出的电路可以在相当低的电源电压下工作。例如,采用合成器来创建法国DVB-H / T标准的频道频率。介绍了电路级和系统级设计。还报告了功耗折衷。结果表明,对于所提到的标准,VCDL仅27个延迟级就足够了。仿真结果证实了分析预测。所提出的基于DLL的频率合成器以0.13um CMOS技术实现。

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