Synchronization Design in Multi-channel DRFM Module

摘要

In many applications involving multiple DRFM processing channels like radar jamming source design, corresponding digital processing arithmetic may require the different channels can operating in a synchronous mode exactly, including both the ADC sampling and the DAC converting. This paper puts focus on this problem during one DRFM module's design and implementation. Taking the designed DRFM module as example, the paper attempts corresponding methods for synchronization realization. For two ADCs channels, a serial of resetting and timing controlling operations are employed. For two DACs channels, resetting the DACs clock source and an additional XOR operation are used. Performance evaluating results show the effective of the methods proposed.