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Design of micro-power amplifier in neural recording application with improved noise efficiency factor

机译:具有改进噪声效率因子的神经记录应用微功率放大器的设计

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In this work, a low noise low power neural signal amplifier is presented. This amplifier consists of a first-order high pass filter and an OTA. We study the effect of using n-type MOSFET and p-type MOSFET in input stage of OTA, on its overall noise. Then two circuit schematic for overall amplifier is suggested. Finally, the simulation results of suggested amplifier are presented. The gain of amplifier is 41.5 dB at frequency range between 0.08 and 28 kHz. The total input noise of this circuit is 1.6 μV and the total power consumption is 5.5 μW from 1.2 v power supply. The NEF of our design is 1.6 that much lower than similar previous works. These results are extracted with 0.13 μm CMOS technology.
机译:在这项工作中,提出了一种低噪声低功率神经信号放大器。该放大器由一阶高通滤波器和一个OTA组成。我们研究了在OTA输入阶段使用n型MOSFET和p型MOSFET对其整体噪声的影响。然后提出了整个放大器的两个电路原理图。最后,给出了建议放大器的仿真结果。在0.08至28 kHz的频率范围内,放大器的增益为41.5 dB。该电路的总输入噪声为1.6 V,使用1.2 V电源时的总功耗为5.5W。我们设计的NEF比以前的类似作品低1.6倍。这些结果是使用0.13μmCMOS技术提取的。

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