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Design of micro-power amplifier in neural recording application with improved noise efficiency factor

机译:具有改进的噪声效率因子的神经记录应用微功率放大器设计

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In this work, a low noise low power neural signal amplifier is presented. This amplifier consists of a first-order high pass filter and an OTA. We study the effect of using n-type MOSFET and p-type MOSFET in input stage of OTA, on its overall noise. Then two circuit schematic for overall amplifier is suggested. Finally, the simulation results of suggested amplifier are presented. The gain of amplifier is 41.5 dB at frequency range between 0.08 and 28 kHz. The total input noise of this circuit is 1.6 μV and the total power consumption is 5.5 μW from 1.2 v power supply. The NEF of our design is 1.6 that much lower than similar previous works. These results are extracted with 0.13 μm CMOS technology.
机译:在这项工作中,提出了低噪声低功耗神经信号放大器。该放大器包括一阶高通滤波器和OTA。我们研究使用N型MOSFET和P型MOSFET在OTA的输入阶段中的效果,更噪声。然后提出了两个电路用于整体放大器的示意图。最后,提出了建议放大器的仿真结果。放大器的增益在0.08和28 kHz之间的频率范围内为41.5 dB。该电路的总输入噪声为1.6μV,总功耗从1.2 V电源为5.5μW。我们设计的NEF是1.6,比以前的工作低得多。这些结果用0.13μmCMOS技术提取。

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