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Algorithm Design for Generation of Fault Dictionary in Analog VLSI Circuits

机译:模拟VLSI电路中故障字典的生成算法设计

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A method is proposed here for development of a new tool which provides fast and efficient way for fault diagnoses in analog CMOS circuits arises due to glitches. The tool follows SBT (simulation before testing) based approach for tests the CMOS analog circuits against faults arises due to glitches. SBT system for fault diagnosis requires some form of a fault dictionary to which the test data is compared. The designed tool generates a fault dictionary which is used in SBT method with distinct pretest and post-test analysis stages. Pretest analysis generates a fault directory. For this the circuit is simulated circuit under all fault combinations, as well as the fault-free case. We can then compute observable variables (voltages or currents), of them, for each combination and store them in an entry of the fault directory.
机译:这里提出了一种用于开发新工具的方法,该方法提供了快速有效的方法来对由于故障而引起的模拟CMOS电路中的故障进行诊断。该工具遵循基于SBT(测试前模拟)的方法来测试CMOS模拟电路,以防止由于毛刺而引起的故障。用于故障诊断的SBT系统需要某种形式的故障字典,将测试数据与之比较。设计的工具将生成故障字典,该字典将在SBT方法中使用,具有不同的测试前和测试后分析阶段。预测试分析将生成故障目录。为此,该电路是在所有故障组合以及无故障情况下的仿真电路。然后,我们可以为每种组合计算其中的可观察变量(电压或电流),并将其存储在故障目录的条目中。

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