Low-Complexity Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip

摘要

Skew calibration and compensation are critical ATE features for reliable functional test, particularly for applications such as memory chips. This paper presents a new time-to-digital converter (TDC) design for off-chip skew calibration from time domain reflectometry (TDR) measurements. It consists of coarse and fine parts which enable the circuit to detect a large skew range with high resolution. Circuit complexity is reduced through use of the proposed automatic edge detection methods which control coarse/fine operations. We also present skew compensation circuits which can de-skew off-chip signals based on the skew calibration. The TDC occupies a small area, making it suitable for implementation in a built-off test (BOT) chip.The circuits were implemented using a 130 nm technology in a built-off test interface (BOTI) developed for 800 Mbps DDR2 memory functional test.