8 GHz, 1 V, high linearity, low power CMOS active mixer

摘要

This paper presents the design and implementation of a new 8-GHz high linearity current commutating CMOS RF mixer. The high linearity of the mixer is attributed to the novel RF transconductor stage, employing a new version of the bias-offset technique. The outstanding features of the mixer are high linearity, low voltage, low power consumption and design simplicity. A prototype implemented in 0.18 μm CMOS technology and operating at 1V power supply features an IIP3 of +3.5 dBm, an IIP2 of better than +45 dBm, an input compression point of -5.5 dBm, a power conversion gain of +6.5 dB while drawing 6.9 mA. The performance of the mixer exceeds that of previously reported active mixers while preserving simplicity of design and satisfying potential requirements for 4G mobile communication systems.