As critical features continue to shrink, image fidelity on a wafer becomes even more important to the performance of an integrated circuit. There are several strategies that are typically employed to produce the best possible features. These include OPC, off-axis illumination and the ever-increasing numerical aperture, neglecting the pattern fidelity of the reticle. Several methodologies exist to characterize the fidelity of these features on both wafer and reticle. This paper will attempt to correlate the area measurements of contacts from a reticle using a scanning electron microscope, an automated visual inspection measurement system and an image based algorithm; and discuss their practical applications for manufacturing.
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