This year's Symposium covers many important topics from timing and clocking to placement and partitioning to benchmarking and design planning. An outstanding set of technical papers has been selected for the program. All of these papers appear here in the paper and electronic versions of the proceedings. In addition, we will provide access to the foils presented at the conference for those authors who allow us to post them. You may check them out at our web site: www.ispd.cc.These papers are complemented by talks from invited speakers. We are delighted to have Raul Camposano as our keynote speaker. Dr. Camposano is Senior Vice President of Technology and Information Systems and the Chief Technical Officer of Synopsys. This year's symposium also includes several invited sessions from specialists in the field. Monday's keynote is followed by two talks on core placement and physical synthesis technology, one from IBM and one from Cadence. Later that afternoon, researchers from IBM and Intel willaddress ASIC design challenges and correct-by-construction design methodologies. Tuesday's invited talks are highlighted by, a Magma talk on a complete design for power methodology and flow for large ASICs and a session on the interactions between lithography and routing. Indeed, routing is hardly a solved problem; many challenges required for next-generation technologies remain. Finally, Wednesday is highlighted by several invited talks by experts from industry and academia who will present physical design and synthesis techniques targeted toward regular circuit fabrics.
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