UNDERFILL FLOW MODELING FOR FLIP CHIP ON BOARD ASSEMBLY

摘要

Flip chip encapsulation using underfill materials has become a standard assembly operation in current manufacturing practice. Initially, this additional process was introduced to handle the thermal stresses due to the different CTE of the chip, the PCB and the solder bump. In due course it was recognized that encapsulation also produced better reliability, mechanical robustness, environment protection, fatigue endurance, strain tolerance, and the ability to handle dynamic loading. The underfill process adds to the assembly expense. Studies have shown that the cost of the flip chip underfill process is approximately 30 % of the flip chip assembly cost. In addition, there is also a significant increase in the time for assembly. Most of the advantages are derived only if there is no voiding of the material during the underfill and subsequent curing. In order to develop an optimum underfill procedure for the variety of flip chip geometries it is necessary that the underfill process be characterized in a significant way. The actual underfill process is driven by capillary action, involves many variables, and has a length scale so small that there are not many existing theories from which analytical extensions can be made. A purely experimental approach will be expensive and lack predictive capacity. Underfill flow simulation is an attractive alternative. The maturing field of computational fluid dynamics (CFD) provides a ready made tool for carrying out simulation studies. Application of CFD is difficult, expensive, and requires substantial investment of time. Current general purpose CFD software cannot yet solve the complete underfill process, nevertheless, some simple flow models can be used for comparisons and predictions. This paper develops a new analytical model for underfill flow. It also includes the results from an initial investigation of flow modeling using the CFD software Fluent. A single phase, steady flow model with heat transfer, and a two-sided full area dispense strategy is examined for different bump arrays.