We present a processor-programmable built-in self-test (BIST) scheme suitable for embedded memory testing in the system-on-a-chip (SOC) environment. The proposed BIST circuit can be programmed via an on-chip microprocessor. Upon receiving the commands from the microprocessor, the BIST circuit generates pre-defined test patterns and compares the memory outputs with the expected outputs. Most popular memory test algorithms can be realized by properly programming the BIST circuit using the processor instructions. Compared with processor-based memory BIST schemes that use an assembly-language program to generate test patterns and compare the memory outputs, the test time of the proposed memory BIST scheme is greatly reduced.
我们提出了一种处理器可编程的内置自测(BIST)方案,适用于片上系统(SOC)环境中的嵌入式内存测试。所建议的BIST电路可以通过片上微处理器进行编程。一旦从微处理器接收到命令,BIST电路就会生成预定义的测试模式,并将存储器输出与预期输出进行比较。通过使用处理器指令对BIST电路进行适当的编程,可以实现大多数流行的存储器测试算法。与使用汇编语言程序生成测试模式并比较内存输出的基于处理器的内存BIST方案相比,所建议的内存BIST方案的测试时间大大减少。 P>
机译:用于嵌入式单端口存储器和双端口存储器的灵活的可编程存储器BIST
机译:用于嵌入式单端口存储器和双端口存储器的灵活的可编程存储器BIST
机译:适用于嵌入式存储器的有效可编程存储器BIST
机译:处理器可编程存储器BIST,用于总线连接的嵌入式存储器
机译:在工作记忆和长期工作记忆的嵌入式过程模型的框架内探索与预期记忆相关的过程
机译:记忆障碍测试的效率和准确性试验1记忆障碍测试的前10个项目存在错误以及五个用于预测无效测试性能的嵌入式措施
机译:用于总线连接的嵌入式存储器的处理器可编程存储器BIsT