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A 6 device SOI new technology for mixed analog-digital and rad-hard applications

机译:6器件SOI新技术,适用于混合模拟数字和抗辐射应用

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DMILL technology is being developped for very rad-hard analog-digital applications, such as space and military circuits or as electronics for the future generation of high energy collider (LHC, CERN, Geneva) [3]. Both CMOS and junction (JFET and bipolar) transistors are needed. A new process has been integrated, based on a 1.2 ¿m thick silicon film on insulator (SIMOX plus epitaxy), a complete dielectric isolation and low temperature process. The main feature is that six-different components are fabricated on the same wafer, taking into account the 12 volts supply voltage constraint for some analog applications. The first electrical characteristics are presented in this paper. The optimization capabilities of such an hardened CBi-CJ-CMOS technology are discussed.
机译:DMILL技术正在开发用于非常抗辐射的模拟数字应用,例如太空和军事电路,或作为下一代高能对撞机(LHC,CERN,日内瓦)的电子产品[3]。同时需要CMOS和结(JFET和双极)晶体管。基于绝缘体上的1.2微米厚硅膜(SIMOX加外延),已经集成了一个新工艺,该工艺具有完整的介电隔离和低温工艺。主要特征是在同一晶片上制造了六种不同的组件,考虑到某些模拟应用的12伏电源电压限制。本文介绍了第一个电气特性。讨论了这种硬化的CBi-CJ-CMOS技术的优化功能。

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