DSP memory allocation method for indirect addressing with widerange update operation by multiple registers

摘要

A novel method to derive an efficient memory access pattern fordigital signal processors (DSPs), of which memory is accessed only byaddress registers (ARs), is proposed. In this paper, the AR updatescheme is extended such that address can be efficiently modified within±k in addition to conventional ±1 updates. The methodformulates program variables and AR modifications by a graph, andextracts a maximum chained clique graph with k+1 vertices, which isaccessed only by AR update operations within ±k, so that theestimated number of overhead codes is minimized. In order to utilizemultiple ARs, a method to assign memory accesses into ARs is alsostudied. The proposed methods are applied to a DSP compiler, and memoryallocations derived for several examples are compared with memoryallocations by other methods