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ADDRESS ASSIGNMENT SENSITIVE VARIABLE PARTITIONING AND SCHEDULING FOR DSPS WITH MULTIPLE MEMORY BANKS

机译：具有多个存储库的Dsp的地址分配敏感可变分区和调度

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Chun Jason Xue; Tiantian Liu; Zili Shao; Jingtong Hu; Zhiping Jia; Weijia Jia; Edwin H. -m. Sha;
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年度 2013
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专利

1. Efficient Variable Partitioning and Scheduling for DSP Processors With Multiple Memory Modules [J] . Qingfeng Zhuge, Edwin Hsing-Mean Sha, Bin Xiao, IEEE Transactions on Signal Processing . 2004,第4期

机译：具有多个内存模块的DSP处理器的高效变量分配和调度
2. Optimizing Address Assignment and Scheduling for DSPs With Multiple Functional Units [J] . Xue C., Shao Z., Zhuge Q., IEEE Transactions on Circuits and Systems. II, Express Briefs . 2006,第期

机译：具有多个功能单元的DSP的地址分配和调度优化
3. Optimizing Address Assignment and Scheduling for DSPs With Multiple Functional Units [J] . Xue C., Shao Z., Zhuge Q., IEEE transactions on circuits and systems. II, Express briefs . 2006,第9期

机译：具有多个功能单元的DSP的地址分配和调度优化
4. Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks [C] . Chun Jason Xue, Tiantian Liu, Zili Shao, Personal, Indoor and Mobile Radio Communications,2005 IEEE 16th International Symposium on . 2008

机译：具有多个存储体的DSPS的地址分配敏感变量分区和调度
5. Memory address management for digital signal processors (DSPs) [D] . Cao, Haian 1999

机译：数字信号处理器（DSP）的内存地址管理
6. Due-Window Assignment Scheduling with Variable Job Processing Times [O] . Yu-Bin Wu, Ping Ji 2015

机译：具有可变作业处理时间的到期窗口分配计划
7. Address assignment sensitive variable partitioning and scheduling for DSPs with multiple memory banks [O] . Xue C, Liu T, Shao Z, 2008

机译：具有多个存储体的DSP的地址分配敏感变量分区和调度

ADDRESS ASSIGNMENT SENSITIVE VARIABLE PARTITIONING AND SCHEDULING FOR DSPS WITH MULTIPLE MEMORY BANKS

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