首页> 外文会议>Symposium on VLSI Circuits >A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor
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A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor

机译:具有零待机功率的32位CPU和通过利用180nm C轴对准的晶体IN-Zn氧化物晶体管实现的1.5时钟睡眠/ 2.5时钟唤醒

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A flip-flop achieving high-speed backup utilizing a Si transistor and long-term retention with zero standby power by means of a transistor of c-axis aligned crystalline (CAAC) In-Ga-Zn oxide, a kind of CAAC oxide semiconductor, featuring extremely low off-state current is proposed. Using the flip-flop, a 32-bit processor has been fabricated with 350-nm Si/180-nm CAAC oxide semiconductor technology, and demonstrated data backup and power shutdown in 1.5 clock cycles at a low power of 1.77 nJ, data recovery in 2.5 clock cycles, and data retention with zero standby power for at least a day. According to simulation results, fast backup and long-term retention can also be achieved with 45-nm Si/180-nm CAAC oxide semiconductor technology.
机译:通过C轴对准结晶(CAAC)IN-GA-Zn氧化物的晶体管,利用Si晶体管和长期保持,实现高速备份的触发器和长期保留,通过C轴对准的晶体(CAAC)In-Ga-Zn氧化物,一种Caac氧化物半导体,提出了极低的离子电流。使用触发器,使用350nm Si / 180-nm Caac氧化物半导体技术制造了32位处理器,并在1.77 nj的低功耗下显示了1.5个时钟周期的数据备份和电源关闭,数据恢复2.5时钟周期,以及零待机电源至少一天的数据保留。根据模拟结果,还可以通过45-nm Si / 180nm Caac氧化物半导体技术实现快速备份和长期保持。

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