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外文会议>Symposium on VLSI Circuits
>A 0.45-V input on-chip gate boosted (OGB) buck converter in 40-nm CMOS with more than 90 efficiency in load range from 2#x00B5;W to 50#x00B5;W
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A 0.45-V input on-chip gate boosted (OGB) buck converter in 40-nm CMOS with more than 90 efficiency in load range from 2#x00B5;W to 50#x00B5;W
A 0.45-V input, 0.4-V output on-chip gate boosted (OGB) buck converter with clock gated digital PWM controller in 40-nm CMOS achieved the highest efficiency to date with the output power less than 40µW. A linear delay trimming by a logarithmic stress voltage (LSV) scheme to compensate for the die-to-die delay variations of a delay line in the PWM controller with good controllability is also proposed.
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