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A vector and array multiprocessor extension of the sylvan architecture

机译:sylvan体系结构的向量和数组多处理器扩展

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The main intent of this paper will be the description of a multiprocessor system that uses microprogrammed hardware to support operating system primitives that contribute to its high performance vector processing capability. The system consists of nodes that communicate over a system interconnect. Each node is a tripartite subsystem that consists of a host processor complex running application code, a vector co-processor and a kernel support processor that handles both operating system functions and control of the vector co-processor. The microcoded kernel processor is used to support a message based operating system that allows concurrent processes to communicate while residing in the same node or in different nodes. Since the kernel processor controls the functioning of the vector co-processor as well as the management of processes (for example, context switching), the node can utilize the resources of the co-processor very effectively.

机译:

本文的主要目的是描述使用微程序硬件来支持有助于其高性能矢量处理能力的操作系统原语的多处理器系统。该系统由在系统互连上进行通信的节点组成。每个节点都是一个三方子系统,由运行应用程序代码的主机处理器,矢量协处理器和同时支持操作系统功能和矢量协处理器控制的内核支持处理器组成。微编码内核处理器用于支持基于消息的操作系统,该操作系统允许并发进程在驻留在同一节点或不同节点中时进行通信。由于内核处理器控制矢量协处理器的功能以及进程的管理(例如,上下文切换),因此节点可以非常有效地利用协处理器的资源。

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