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Circuit methods for the integration of low voltage (1.1-1.8 V) analog functions on system-on-a-chip ICs in single-poly CMOS processes

机译:在单多晶硅CMOS工艺中在片上系统IC上集成低压(1.1-1.8 V)模拟功能的电路方法

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Several new building blocks are demonstrated, which enable low-power (1.1-1.8 V) analog functionality in a single-poly, digital CMOS process. These cells facilitate the integration of analog converters on system-on-a-chip IC's without adding any extra cost to the process. A voice A/D, designed with these circuits, exhibited an SNR of 68 dB at an analog supply voltage of 1.1 V, and 75 dB at 1..8 V. This is despite the noisy digital environment of an on-chip DSP operating at 60 MHz and a digital supply voltage of 2.5 V.
机译:演示了几个新的构建块,这些构建块可在单多晶硅数字CMOS工艺中实现低功耗(1.1-1.8 V)模拟功能。这些单元有助于将模拟转换器集成在片上系统IC上,而不会增加任何额外的处理成本。使用这些电路设计的语音A / D在1.1 V模拟电源电压下的SNR为68 dB,在1..8 V电源下的SNR为75 dB。尽管片上DSP在嘈杂的数字环境下工作, 60 MHz的频率和2.5 V的数字电源电压。

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