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Delay and power estimation for a CMOS inverter driving RC interconnect loads

机译:驱动RC互连负载的CMOS反相器的延迟和功率估计

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The resistive-capacitive behavior of long interconnects which are driven by CMOS gates is analyzed in this paper. The analysis is based on the /spl pi/-model of an RC load and is developed for submicron devices. Accurate and analytical expressions for the output voltage waveform, the propagation delay and the short circuit power dissipation are derived by solving the system of differential equations which describe the behavior of the circuit. The effect of the coupling capacitance between input and output and that of short circuit current are also incorporated in the proposed model. The calculated propagation delay and short circuit power dissipation are in very good agreement with SPICE simulations.
机译:本文分析了由CMOS栅极驱动的长互连的电阻电容行为。该分析基于RC负载的/ spl pi /模型,是针对亚微米设备开发的。通过求解描述电路行为的微分方程组,可以得出输出电压波形,传播延迟和短路功耗的准确和解析表达式。在输入和输出之间的耦合电容的影响和短路电流的影响也纳入了所提出的模型。计算得出的传播延迟和短路功耗与SPICE仿真非常吻合。

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