Impact of transistor mismatch on the speed-accuracy-power trade-off of analog CMOS circuits

摘要

The influence of transistor mismatch on the trade-off between speed, accuracy and power consumption of basic building blocks and analog systems is investigated. The ratio (Speed Accuracy/sup 2/)/Power for a circuit or system in CMOS is shown to be only dependent on technological constants which express the matching quality of the technology. Moreover, the minimal power consumption of high speed analog systems in CMOS imposed by transistor mismatch is two orders higher than the limit imposed by thermal noise.