首页> 外文会议> >VLSI implementation of a complete chip set for an MPEG2 real-time encoder
【24h】

VLSI implementation of a complete chip set for an MPEG2 real-time encoder

机译:VLSI对MPEG2实时编码器的完整芯片组的实现

获取原文

摘要

We have developed a real-time encoder chipset which completely complies to the standard ISO/IEC13818-2|ITU-TH.262 (also known as "MPEG2 Video"), for the Main Profile at Main/High Level. This set consists of the following five chips: the "PRE" (Pre-processing) chip, the "CME" (Coarse Motion Estimation) chip, the "COD" (Predictive Coding) chip, the "QVL" (Orthogonal Transformation, Quantization, and Variable Length Coding) chip, and the "FME" (Fine Motion Estimation) chip. One set of these five chips is sufficient for real-time encoding of source images equivalent to the ITU-RBT.601 standard, and by connecting eight sets together, HDTV level real-time encoding is possible.
机译:我们开发了一个实时编码器芯片组,完全符合标准ISO / IEC13818-2 | ITU-TH.262(也称为“MPEG2视频”),主页型在主/高电平。该集包括以下五个芯片:“Pre”(预处理)芯片,“CME”(粗运动估计)芯片,“COD”(预测编码)芯片,“QVL”(正交变换,量化和可变长度编码)芯片,以及“FME”(精细运动估计)芯片。这五个芯片中的一组足以进行等于ITU-RBT.601标准的源图像的实时编码,并且通过将八个组连接在一起,HDTV电平实时编码是可能的。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号