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Gate Electrode Engineering By Control Of Grain Growth For High Performance And High Reliable 0.18/spl mu/m Dual Gate CMOS

机译：通过控制晶粒长大实现高性能和高可靠性的0.18 / spl mu / m双栅极CMOS的栅电极工程

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《》|2001年|P.107-108|共2页
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Shimizu; S.; Kuroi; T.;
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中图分类无线电电子学、电信技术;
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专利

1. Three-dimensional metal gate-high-/spl kappa/-GOI CMOSFETs on 1-poly-6-metal 0.18-/spl mu/m Si devices [J] . Yu D.S., Chin A., Liao C.C., IEEE Electron Device Letters . 2005,第2期

机译：1-poly-6-metal 0.18- / spl mu / m Si器件上的三维金属栅极高/ spl kappa / -GOI CMOSFET
2. Sub-1/4-/spl mu/m dual-gate CMOS technology using in-situ doped polysilicon for nMOS and pMOS gates [J] . Okazaki Y., Kobayashi T. IEEE Transactions on Electron Devices . 1995,第9期

机译：低于1/4 / splμm/ m的双栅极CMOS技术，使用用于nMOS和pMOS栅极的原位掺杂多晶硅
3. Record Q symmetrical inductors for 10-GHz LC-VCOs in 0.18-/spl mu/m gate-length CMOS [J] . Tiemeijer L.F., Havens R.J., Pavlovic N., IEEE Electron Device Letters . 2002,第12期

机译：在0.18- / splμ/ m栅极长度CMOS中为10-GHz LC-VCO记录Q对称电感器
4. Gate Electrode Engineering By Control Of Grain Growth For High Performance And High Reliable 0.18/spl mu/m Dual Gate CMOS [C] . Shimizu S., Kuroi T., Institute of Electric and Electronic Engineer Symposium on VLSI Technology . 2001

机译：通过控制高性能和高可靠0.18 / SPL MU / M双栅极CMOS的晶闸电极工程
5. Metal alloys and gate stack engineering for CMOS gate electrode applications. [D] . Chen, Bei. 2006

机译：用于CMOS栅电极应用的金属合金和栅堆叠工程。
6. Controlled Dual Growth Factor Delivery From Microparticles Incorporated Within Human Bone Marrow-Derived Mesenchymal Stem Cell Aggregates for Enhanced Bone Tissue Engineering via Endochondral Ossification [O] . Phuong N. Dang, Neha Dwivedi, Lauren M. Phillips, 2016

机译：从纳入人骨髓间充质干细胞聚集体的微粒中控制的双重生长因子递送用于通过内软骨骨化增强骨骼组织工程
7. Gate-Workfunction Engineering Using Poly-(Si,Ge) for High-Performance 0.18µm CMOS Technology [O] . Ponomarev Y.V., Salm C., Schmitz J., 1997

机译：采用poly-（si，Ge）的高功率0.18μmCmOs工艺的栅极功函数工程

Gate Electrode Engineering By Control Of Grain Growth For High Performance And High Reliable 0.18/spl mu/m Dual Gate CMOS

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