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EXPRESSION: a language for architecture exploration through compiler/simulator retargetability

机译:EXPRESSION:一种通过编译器/模拟器可重定向性进行架构探索的语言

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We describe EXPRESSION, a language supporting architectural design space exploration for embedded systems-on-chip (SOC) and automatic generation of a retargetable compiler/simulator toolkit. Key features of our language-driven design methodology include: a mixed behavioral/structural representation supporting a natural specification of the architecture, explicit specification of the memory, subsystem allowing novel memory organizations and hierarchies; clean syntax and ease of modification supporting architectural exploration; a single specification supporting consistency and completeness checking of the architecture; and efficient specification of architectural resource constraints allowing extraction of detailed reservation tables for compiler scheduling. We illustrate key features of EXPRESSION through simple examples and demonstrate its efficacy in supporting exploration and automatic software toolkit generation for an embedded SOC codesign flow.
机译:我们描述了EXPRESSION,一种支持嵌入式片上系统(SOC)的体系结构设计空间探索以及自动生成可重定目标的编译器/模拟器工具包的语言。我们语言驱动的设计方法的主要特征包括:混合的行为/结构表示,支持架构的自然规范,显式的内存规范,允许新颖的内存组织和层次结构的子系统;简洁的语法和易于修改的结构,可支持体系结构探索;支持架构一致性和完整性检查的单一规范;架构资源约束的有效规范,允许提取详细的预留表以进行编译器调度。我们通过简单的示例说明了EXPRESSION的关键功能,并展示了其在支持探索和自动生成嵌入式SOC代码签名流程的软件工具包方面的功效。

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