Testing gigabit multilane SerDes interfaces with passive jitter injection filters

摘要

With high speed IO interfaces approaching Terabit bandwidth, multilane SerDes (serialize/deserialize) IO architectures become promising. By putting high speed serial data links in parallel, the IO interface bandwidth is significantly increased. The architecture however, has imposed several challenges in production testing. On one hand, the traditional bit error rate test cannot be cost effectively deployed with massive amounts of SerDes put in parallel. On the other hand, a simple loopback test does not provide adequate test coverage for analog performance variations. In this paper, we present a test methodology based on a passive filter technique to enhance the traditional loopback test by including jitter tests.