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On the optimization power of redundancy addition and removal for sequential logic optimization

机译:关于顺序逻辑优化的冗余添加和移除的优化能力

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The paper attempts to determine the capabilities of existing redundancy addition and removal (SRAR) techniques for logic optimization of sequential circuits. To this purpose, we compare this method with the retiming and resynthesis (RaR) techniques. For the RaR case the set of possible transformations has been established by relating them to STG transformations by other authors. Following these works, we first formally demonstrate that logic transformations provided by RaR are covered by SRAR as well. Then we also show that SRAR is able to identify transformations that cannot be found by RaR. This way we prove the higher potential of the sequential redundancy addition and removal over the retiming and resynthesis techniques.
机译:本文试图确定连续电路的逻辑优化逻辑优化的现有冗余加法和去除(SRAR)技术的能力。为此目的,我们将这种方法与Retiming和ReN合成(RAR)技术进行比较。对于RAR案例,通过将它们与其他作者的STG转换相关联建立了一系列可能的转换。在这些工作之后,我们首先正式证明RAR提供的RAR提供的逻辑变换也是如此。然后我们还表明SRAR能够识别RAR无法找到的转换。这样,我们证明了序贯冗余加法和在重新连接和重新合作技术上移除的较高潜力。

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