A novel VLSI design and implementation of a low power 8-bit microcontroller using asynchronous logic is proposed in this paper. Taking advantage of the low power potential of asynchronous logic, the 2-stage pipelined MCU is carefully designed by chosen proper architecture as well as suitable asynchronous signal protocols which including a combination of a specific "Completion Detection Method" and "matching delay Method". Other low power design techniques such as "Gating Clock" also applied to the design. Using synchronous design flow and standard-cell library facilitates the VLSI design and circuit implementation. Fabricated in Chartered 0.6 um CMOS technology, this low power asynchronous MCU achieves only 16% power dissipation of the conventional designed PIC16C61, which shares the same instruction set and function as the MCU we designed.
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机译:本文提出了一种采用异步逻辑的低功耗8位微控制器的新型VLSI设计和实现。利用异步逻辑的低功耗潜力,通过选择适当的体系结构以及适当的异步信号协议(包括特定的“完成检测方法”和“匹配延迟方法”的组合)来精心设计2级流水线MCU。其他低功耗设计技术(例如“门控时钟”)也适用于设计。使用同步设计流程和标准单元库有助于VLSI设计和电路实现。这种低功耗异步MCU采用特许的0.6 um CMOS技术制造,其功耗仅为传统设计的PIC16C61的16%,而PIC16C61与我们设计的MCU具有相同的指令集和功能。
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