A 3.6 mW 1.4 V SRAM with non-boosted, vertical bipolar bitline contact memory cell

摘要

Low-voltage SRAMs operating at >3 V are currently used for handy terminals. However, demand for lower-voltage operation has increased. It is difficult to reduce operating voltage below 2.5 V with a conventional low-power SRAM with 4-nMOS-transistor cell. Although a full CMOS cell or a boosted word line technique could reduce operating voltage, they have certain problems, i.e., a larger cell or elaborate timing control for boost. This 256 kb, low-power SRAM uses a bipolar bit line contact (BBC) memory cell, and features small cell, low operating voltage, low power dissipation and fast access.