Asymmetrically-dope buried layer (ADB) structure CMOS for low-voltage mixed analog-digital applications

摘要

A new CMOS structure is developed distinguished by an asymmetrically-doped buried layer (ADB), which achieves a high transconductance and a high drain output resistance down to 0.3-/spl mu/m technology necessary for high performance analog circuits at low-voltage power supply. The drain output resistance is increased by 50 times at 0.8-/spl mu/m technology and 5.5 times at 0.3-/spl mu/m technology. The transconductance is also increased by 1.8 times at 0.8-/spl mu/m technology and 1.3 times at 0.3-/spl mu/m technology.